Here be dragons: Preventing static damage, latchup, and metastability in the 386

I think the metastability can't destroy a chip thing is not true, you can get a flop into a state where it's oscillating at whatever freq the internal feedback path is (maybe up to GHz) rather than resolving to a stable 1 or 0. That can propagate to adjacent flops resulting in a bunch of flops pulling too much current.

Like anything to do with metastability this is a statistical thing - it can do this, but it's highly unlikely.

I worked on a chip in the mid 90s where we were very careful about our clock crossings, dropped in special high-gain anti-metastability flops, designed logic to reduce synchronised signal frequencies etc etc all the good stuff - we calculated that we'd see a failure (and mostly that would be a pixel burble on the screen) every year or so - at the time Win95 couldn't stay up a week so management decided to ship it

Are the techniques described in the article still in use today or have they been superseded?

Yes, although it's not very likely.

But keep in mind that final assembly and packaging is typically happening in large, air-conditioned halls with vinyl floors, conveyor belts, plastic office chairs, disposable coveralls, etc. There's more static zaps in places like that than in a home with wooden floors, reasonable humidity, and casual clothing.

And then, as Ken notes, there's the question of scale. If you statistically kill one chip in 200, you might not even notice that in a home lab. But for a manufacturer, that's more faulty devices shipping to customers than they want.

I damaged an embedded development board by walking across a carpeted room before touching it. When I touched it I heard, felt, and saw the zap and one of the IO ports was stuck after that.

At one company I worked for that was making embedded devices we had a period of unusually high rate of USB hardware failures in new devices. It was not really conclusively investigated but from what I've heard it was likely a period of low humidity and the people working on assembly not wearing wrist straps consistently.

Sure, I've seen enough motherboards with fried USB controllers caused by an ESD while plugging in USB memory sticks.

This is in a climate with fairly cold winters (-40°C and below isn't unheard of), so layers of wool clothing and very low humidity. It's been less of a problem recently because modern motherboards come with ESD protection, but 10-15 years ago shared computers with most USB ports no longer working were the norm.

I always touch ground before working on electronics, and often get zapped. It's a fairly common practice here AFAIK.

Part of it is that the incentives are different for you and for the chip manufacturer. You're not going to notice if, hypothetically, one in a hundred processors gets fried from careless handling. But a 1% return rate is a huge cost to Intel that they would want to avoid.

You will fry something if you don't use anti static measures and work on enough boards.

Moisture, clothing, habits play a role so it's highly variable.

I never have, and I've been in embedded for ages. So I've dealt with my fair share of chips, consumer electronics and not.

But one vital thing to understand is that a lot of those "vendor recommendations" exist to cover for rare 1% to 0.1% edge case failures.

You can put together 20 PCs, with none of them dying from ESD, and conclude that ESD "isn't a real issue". But if you have a company that puts together tens of thousands of PCs per month? Then those ugly 0.1% edge case failures WILL pop up and they WILL cost you. And if you employ enough people, one of them might be a son of Zeus with a wild Wimshurst machine hairstyle - capable of emitting two high power ESDs, complete with an audible crackle and a visible spark, per minute. So ESD straps it is.

The same applies to things like humidity control or reflow profiles for electronics. Not an issue ~99% of the time. The remaining ~1% can fuck you over in mass manufacturing, so disrespect the vendor at your own peril.

> Has anybody ever actually destroyed a chip with static electricity?

Piling on, but yes, you very well may have: https://www.youtube.com/watch?v=tcRqj9FhgcE

When you’re digging around in tens to hundreds of PCs each day, the odds of zapping something are higher. I’ve killed a few chips and boards.

Is wonder if there's a strong correlation between whether you experience static zaps in your daily life and your propensity to fry chips with ESD.

When you fry a chip is it obvious because you experience a zap?

If so, then that would make all this "make sure you're grounded" ceremony less mysterious — because unless you feel a zap (even a tiny one) you probably haven't fried a chip, and it doesn't generally happen in environments where you don't feel zaps.

Obvious caveat: "feeling" a zap is not a precise measurement. But perhaps "zaps fry chips" is a lie which reveals a greater truth.

Decades ago I was in the PC manufacturing and repair business. I religiously used anti-static mats, straps, And diffusers, but I still destroyed several thousand dollars of equipment over those years from equipment/ grounding failures, or even picking a PC up (accidentally touching a port) to put it on a bench.

It was interior Alaska, where humidity is low enough that an orange turns into a passable golf ball in a week and a half, so that was definitely a factor.

TLDR static electricity is bad for electronics, and damage does not necessarily show up as failure but often manifests as flaky behavior.

You built a few computers a year? Max? It becomes a much bigger issue when you're handling dozens of systems a day.

As far as I know, same here. The only thing I do is grab a ground lug from a electrical outlet before handling chips and boards. Which may be superstition and ineffective. I may be doing the right thing or I may be using up my luck and one day fry something expensive.

One thing I remember from my time in the CPU industry is that ESD damage can be cumulative and also can have a delayed effect. So just because you handle a device without precautions today, doesn't mean it won't fail at some time in the future as a result. That said, I've never used precautions in home/hobby projects.

The higher the feature density, the likelier a discharge of a given voltage will cause physical damage?

Historically this was a huge concern because not every manufacturer implemented their ESD protection properly; or, on occasion, the process technology meant that ESD protection would hinder the functionality of the device. This happened a lot in RF circuits, and still to this day many RF instruments are extremely sensitive to ESD events. Board assembly was also a lot less automated in the early days of integrated circuits, so more human handlers and more opportunities for ESD events were anticipated.

Modern IC ESD protection is very effective against a few moderate energy events distributed on different pins, and there's a few industry standards that help determine the required amount of caution for dealing with a particular IC (HBM or human-body model, and CDM or charged-device model, are common - targeted toward human assembly procedures and things like triboelectric or inductive charge buildup). In the right climate, a single high energy event is sometimes enough to degrade functionality or (rarely) completely destroy the device, so board assembly and semiconductor manufacturing facilities still require workers to use wrist straps, shoe grounders, mats, treated floors, climate control, etc. Some high voltage GaN work I did years ago required ionizing blowers (basically a spark gap with a fan) because GaN gates are easy to destroy with gate overstress, and there are risks involved with unintended high voltage contact with typical ESD protective solutions. In another embedded-focused lab, the only time I've ever seen someone put on a wrist strap was for handling customer hardware returns. It really depends what you're working with, and in what environment.

I've more frequently (once or twice a year) had devices which exhibit symptoms of something being wrong at the inputs or the outputs, but only on a specific pin or port. For outputs, some symptoms include the output slew rate is inadequate, or the output appears stuck sometimes, or the output has higher than expected voltage noise (though this is a non-exhaustive list). For inputs, the symptoms are more complex - sometimes there's a manifestation at the outputs for amplifiers or other linear circuits, but for feedback systems or digital systems they might behave as though an input is stuck, toggling slowly, etc. which is difficult to distinguish from other, more common errors. I've also directly been the cause of several ESD failures, but in these cases the test objective was to determine the failure thresholds for the system, so I'm not sure that counts.

I've had a customer hardware failure that was eventually traced back to electrical overstress damage on a single pin of an IC near the corner of a board, right where someone might put their thumb if they were holding the board in one hand. In the absence of a better explanation, I suggested this was an ESD failure due to handling error. I never heard about it again, which is weak evidence in favor of a one-off ESD event.

Yeah I'm pretty sure I've seen processors and memory both get eaten by ESD. Of course its impossible to prove but techs that didn't use protection had higher RMA rates on components so it gots to a point where the conclusion drew itself.