They've hit volume in not only the Nintendo and Sony games consoles mentioned in the article but also in vast numbers of network routers and WIFI access points which are not as flashy as games consoles but are ubiquitous and have much longer lifetimes -- they might total 5-10 times as many as the ~375m MIPS-based games consoles.
MIPS was also a force in supercomputers. Not at the very top, but at one point around 2000 an Origin 2000 at LANL was in the top 10 supercomputers in the world and there were a number of others in the top 20 or 30.
SGI in general was doing so well with MIPS for a long time in the 1990s but they both died, essentially, because SGI backed the wrong horse and believed the Itanium hype, abandoning the MIPS ISA just as it was at its most successful.
The MIPS ISA itself is such a classic and timeless design. There were a couple of quirks, especially the delay slots, and also the need for many conditional branches to first do a `slt` to a register and then a `beq/bne` on the result, taking more instructions an an ISA with a single "compare and branch" instruction.
Like ARM, MIPS started with fixed size 4-byte instructions and then introduced first a separate mode for 2-byte instructions (MIPS16, similar to Thumb) and then 2-byte and 4-byte instructions integrated in one instruction stream (microMIPS, similar to Thumb2), but they were always a few years behind Arm -- reactive, not leaders.
2018's nanoMIPS is a seriously nice ISA but was just much too late to save MIPS, especially given that the similar RISC-V was already gaining traction.
It's hard work and very expensive designing and maintaining your own ISA and all the software for it. MIPS has good hardware engineers in the past, let's hope they can have regained success with the increasingly-popular RISC-V ISA where they can concentrate on the engineering
DonHopkins · 3h ago
I has having lunch with some hardware designers from SGI and Sun, and the SGI people mentioned jokingly that the MIPS could be both big-endian and little-endian, which they called SPIM. Then they pointed out much to the embarrassment of the Sun people (including me at the time) that the little-endian version of the SPARC would be called CRAPS.
jecel · 1h ago
SPIM was the name of a MIPS32 simulator widely used in computer science research at one point:
RISC-V looks a lot more like MIPS than it does RISC-I to IV, so on the technical side having MIPS-the-company abandon MIPS-the-architecture was not such a huge change. And DLX that the Hennessy and Patterson books used before they were changed to RISC-V was essentially MIPS as well.
They've hit volume in not only the Nintendo and Sony games consoles mentioned in the article but also in vast numbers of network routers and WIFI access points which are not as flashy as games consoles but are ubiquitous and have much longer lifetimes -- they might total 5-10 times as many as the ~375m MIPS-based games consoles.
MIPS was also a force in supercomputers. Not at the very top, but at one point around 2000 an Origin 2000 at LANL was in the top 10 supercomputers in the world and there were a number of others in the top 20 or 30.
SGI in general was doing so well with MIPS for a long time in the 1990s but they both died, essentially, because SGI backed the wrong horse and believed the Itanium hype, abandoning the MIPS ISA just as it was at its most successful.
The MIPS ISA itself is such a classic and timeless design. There were a couple of quirks, especially the delay slots, and also the need for many conditional branches to first do a `slt` to a register and then a `beq/bne` on the result, taking more instructions an an ISA with a single "compare and branch" instruction.
Like ARM, MIPS started with fixed size 4-byte instructions and then introduced first a separate mode for 2-byte instructions (MIPS16, similar to Thumb) and then 2-byte and 4-byte instructions integrated in one instruction stream (microMIPS, similar to Thumb2), but they were always a few years behind Arm -- reactive, not leaders.
2018's nanoMIPS is a seriously nice ISA but was just much too late to save MIPS, especially given that the similar RISC-V was already gaining traction.
It's hard work and very expensive designing and maintaining your own ISA and all the software for it. MIPS has good hardware engineers in the past, let's hope they can have regained success with the increasingly-popular RISC-V ISA where they can concentrate on the engineering
https://spimsimulator.sourceforge.net/
RISC-V looks a lot more like MIPS than it does RISC-I to IV, so on the technical side having MIPS-the-company abandon MIPS-the-architecture was not such a huge change. And DLX that the Hennessy and Patterson books used before they were changed to RISC-V was essentially MIPS as well.